Ai Hardware
Mitigating Positional Encoding Degradation in Memristor-Based Analog Computation for ASR
Memristor-based analog computation offers efficiency for neural network models in NLP, but suffers from distortion during weight programming and execution. This work identifies positional encoding transformations as a key source of degradation, particularly impacting the Analog-to-Digital Converter …
On-Chip Synaptic Plasticity Extends Radiation Fault Tolerance in Neuromorphic FPGAs
This paper presents an experimental radiation-hardness study of a spiking neural network (ODIN SNN processor) mapped onto flash-based FPGAs, exposed to a high-energy neutron beam to simulate space/avionics environments. The key finding is that enabling Spike-Dependent Synaptic Plasticity (SDSP) — an…
MORPH Repurposes AI ASICs for High-Throughput ZKP Proving via Kernel Reformulation
MORPH reformulates ZKP kernels—MSM and NTT—to leverage AI ASIC matrix units, converting high-precision modular ops into low-precision GEMMs and optimizing dataflows to minimize memory shuffles. It introduces Big-T complexity, a hardware-aware model accounting for heterogeneous bottlenecks and layout…
TFLN Modulators Enable Low-Latency Analog Nonlinearities for Transformer Attention
Thin-film lithium niobate Mach-Zehnder modulators implement electro-optic Softmax and Sigmoid alternatives, reducing nonlinear computation latency in transformers despite comprising <1% of operations. Demonstrated in Vision Transformers and LLMs with competitive accuracy under 4-bit quantization …
Emerging AI Inference Accelerators: A Landscape of Specialization
The AI inference market at data center scale is attracting new entrants focusing on specialized architectures to address the demanding performance, cost, and power efficiency requirements of large language models. These companies are developing purpose-built silicon, ranging from highly flexible, re…
Intel and Musk’s Companies Partner for AI/Robotics Terafab Project
Intel has partnered with SpaceX, xAI, and Tesla on the Terafab project, aiming to achieve 1 TW/year of compute for AI and robotics. This collaboration leverages Intel's expertise in designing, fabricating, and packaging high-performance chips at scale to support the ambitious computational goals of …
TPUs: Acknowledged for Exceptional Performance via Social Media Poll
A recent social media poll conducted by Logan Kilpatrick indicates a strong positive sentiment towards TPUs (Tensor Processing Units). The sole comment highlights their "truly incredible" nature. This suggests broad recognition of TPUs' high performance capabilities within the polled audience.
Stochastic Computing for Post-Moore's Law AI
Ex-Tropic is developing a physics-based computing paradigm for AI, addressing the approaching "Moore's Wall" where traditional transistor scaling is becoming unreliable due to thermal fluctuations at the atomic level. Their approach leverages the inherent stochasticity of electron movement in specia…
Nvidia’s Full-Stack AI Strategy: Beyond the Chip
Nvidia is transitioning from a GPU company to a full-stack accelerated computing and AI factory provider. Their strategy involves deep vertical integration from chips to software and infrastructure, enabling them to optimize performance and expand into diverse industries. This approach positions Nvi…
NVIDIA Accelerates AI Inference Growth with Blackwell and Rubin Platforms
NVIDIA's CEO Jensen Huang indicates an accelerated growth trajectory for the company, driven by the expanding AI inference market. The company projects over $1 trillion in high-confidence revenue visibility from its Blackwell and Rubin platforms by the end of 2027, excluding contributions from other…
Apple M5 Chip: Enhanced AI and Graphics Performance
The Apple M5 chip, fabricated with third-generation 3-nanometer technology, significantly advances AI and graphics capabilities across Apple products. It integrates Neural Accelerators within its 10-core GPU, delivering over 4x peak GPU compute performance for AI workloads compared to the M4. This a…